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A high resolution DDFS design on VHDL using Bipartite table method

Periodicals of Engineering and Natural Sciences · Ocak 2017

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A high resolution DDFS design on VHDL using Bipartite Table Method
Periodicals of Engineering and Natural Scinces · 2017 ESJI, WorldCat, Scopus, CiteFactor, ..
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Makale Bilgileri

DergiPeriodicals of Engineering and Natural Sciences
Yayın TarihiOcak 2017
Cilt / Sayfa5 · 305-313
Erişim🔓 Açık Erişim
Özet In this study, a Look Up Table (LUT) based Direct Digital Frequency Synthesizer (DDFS) is designed on VHDL. Bipartite Table Method, an advance memory compression method, is used together with quadratic compression method. 23 mHz frequency resolution is achieved with 100MHz clock input. The required memory is obtained 585 times smaller than traditional DDFSs. A MATLAB code is revealed to select the best design which provides the smallest required memory for 100 dB Spurious Free Dynamic Range (SFDR) level. The contents of the LUTs are also evaluated by using MATLAB software. The design is simulated for multiple frequencies between 23mHz-30MHz with VIVADO 2016.3 software. The simulation results perfectly match with calculations.

Yazarlar (2)

1
Yunus Emre Acar
2
Ercan Yaldiz

Anahtar Kelimeler

Bipartite Table Method DDFS DDS Quadratic Compression VHDL

Kurumlar

Selçuk Üniversitesi
Selçuklu Turkey

Metrikler

1
Atıf
2
Yazar
5
Anahtar Kelime